Strained silicon is being used by the semiconductor industry to improve transistor performance. Increased strain levels are desired in future technology nodes (e.g., 22 nm and beyond) to continue to improve transistor performance. In general, there are two methods to apply strain on devices: global and local strain engineering. Global biaxial tensile strain can be readily achieved by growing Si (silicon) on relaxed SiGe (silicon germanium) buffer layers, which are grown epitaxially on a Si wafer. However, biaxial tensile strain offers a small enhancement in transistor performance. Local strain engineering is the standard method to exert uniaxial tensile and compressive strain on n-channel and p-channel metal oxide semiconductor field effect transistors (MOSFETs), respectively. Uniaxial tensile strain can be obtained, for example, by depositing a nitride layer on the transistor or by forming embedded SiC (silicon carbide) source/drain structures. Uniaxial compressive strain is achieved by either depositing nitride layers or by embedded SiGe. However, both methods lose their effectiveness as the technology is scaled and the transistor pitch becomes smaller.